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Fig.25 Test setup for measuring DAC sensitivity to jitter.

Additional simulations not shown here have revealed that the error spectrum for a 100% DAC is almost identical to that obtained from the ADC jitter model developed by Harris.13

The accuracy of the error model can be verified by performing measurements with physical DACs where a known jitter signal is introduced into the digital interface signal; this 14 technique has also been used by Peter van Willenswaard. 14 Fig.25 shows the test arrangement used. A CD transport's digital output is connected to a custom digital interface unit, which comprises a transmitter and a receiver circuit very similar to that shown in fig.4. The receiver locks on to the incoming digital interface signal and passes the unscrambled data to the transmitter, which performs a complementary function and outputs an interface signal to the DAC under examination. Now the edge timing on the output of the transmitter is controlled by the recovered clock in the receiver, so applying signals to the control voltage on the receiver PLL allows direct injection of jitter into the digital interface signal.

In the following tests we introduce sinusoidal jitter to the interface timing by connecting a signal generator to the PLL control voltage. (Note that the PLL control voltage governs instantaneous clock frequency, so we must follow the law of Equation 14 in order to accurately predict injected jitter amplitude.) The DAC output is then digitized using a 16-bit ADC with an independent clock, and analyzed for jitter-related artifacts using a PC.

Fig26a shows the output spectrum from the test DAC using a 0dBFS, 10kHz CD test tone with no jitter introduced into the interface. (The test unit in this example was the Musical Fidelity Digilog DAC of 16-bit, 4x-oversampling design.) The spectrum is quite pure, with a second harmonic at-96dB relative to the fundamental (the line at 2kHz is due to an idle tone in the ADC). Now consider the measured spectra shown in fig26b, where 1kHz, 10ns peak jitter has been introduced into the digital datastream, causing sidebands to appear at approximately-73dBFS either side of the fundamental. A second measurement is presented in fig.26c, using the same jitter signal, but this time employing a CD-test tone of 2kHz. Both measurements show good agreement with the simulations in terms of both relative levels (within 3dB) and spectral shape, and verify the accuracy of the 100% DAC jitter model.

This jitter-injection method can also be used to assess the performance of the PLL filter employed in the interface


13 Harris, ibid.
14 Peter van Willenswaard, Stereophile, October 1991, Vo1.14 No.10, Pp.63-69.

receiver inside the DAC; if the jitter frequency is increased while maintaining constant amplitude, the amplitude of the error sidebands also remains constant until the break frequency of the loop is encountered. This technique was use 4 to determine fix,at the PLL cutoff frequency of Musical Fidelity DAC was approximately 5kHz, implying that any jitter components below this frequency won t be attenuated by this particular unit, and will contribute to jitter error at the DAC.

Impulsive Sample DAC We now progress to the impulsive DAC model, in which digital data samples are output as weighted impulses with. no interaction between adjacent samples (fig.23b). The output impulses are narrow and occur at a sampling rate fs (44.1kHz in our simulations). Of course, this is a theoretical construct; no prac-

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Fig.26 Musical Fidelity Digilog, 16-bit, 4x-oversampled 100% DAC measured jitter error spectra for (from top to bottom): a) 10,001Hz at 0dBFS audio, no jitter; b) 10,001Hz at 0dBFS audio, 10ns peak, 1kHz jitter; c) 2001Hz at 0dBFS audio, 10ns peak, 1kHz jitter.


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